The present invention relates to a high speed N bit analog - digital converter of the dichotomizing type.
An analog - digital converter is an integrated circuit, which can be produced both with bipolar technology and with MOSFET, MESFET or JFET technology on a gallium arsenide or silicon substrate.
High speed analog - digital converters became available a few year ago and since then their use has spread widely aided by the general tendency of digitally processing analog signals. Fields of use for such converters are digital television, digital oscilloscopy and in general terms all the processing fields of high frequency signals (radar, displays, etc). These circuits make it possible to convert and sample at high frequency an analog signal.
Components are now available, whose sampling frequency can reach 20 MHz for circuit in MOS technology and 100 MHz for a circuit in bipolar technology. The resolution of known circuits is generally limited to 8 bits.
A conventional analog - digital conversion method consists of comparing a voltage signal V to be digitized with 2.sup.N reference signals regularly distributed in the range [V.sub.o -V.sub.ref,V.sub.o +V.sub.ref ] of admissible voltages, N expressing the resolution in numbers of bits, followed by the encoding in a priority manner of the outpus of 2.sup.N comparators in order to produce a digital signal of N bits.
This method leads to two limitations. On the one hand, the resolution rarely exceeds 8 bits, because such a resolution requires 2.sup.8 or 256 comparators. On the other hand the pass band is limited by the fact that is is necessary to distribute the input signal V over each of the comparators, which makes it necessary to use an external amplifier.
The performances of an analog - digital converter based on this method are also limited by difficulties of a technological nature in:
the realization of a very precise resistor network for producing the 2.sup.N reference voltage signals, PA1 control of the offset of the comparators, which could otherwise lead to deficient codes, i.e. to the impossibility of supplying the given digital signal, no matter what the analog voltage V, and PA1 compromise between the speed and consumption of the comparators.
An analog - digital conversion method is also known giving performance levels comparable to the first method, while reducing the number of components thereof and consequently the consumption. This method utilizes the known dichotomy principle.
An analog - digital converter utilizing this method comprises a sample and hold circuit receiving the voltage signal V to be digitized, followed by N identical cells in cascade. Each cell comprises two elements, namely a comparator receiving at the input an analog signal V.sub.e and a reference signal V.sub.ref and an amplifier supplying a signal V.sub.s equal to 2x .vertline.V.sub.e -V.sub.ref :2.vertline..
The signal V.sub.e received by a cell is the signal V.sub.s of the preceding cell and for the first cell it is the signal V. All the outputs of these comparators form the digitized value in Gray code of the sampled signal V.
However, this method is not without disadvantages. Thus, in each cell, the amplifier applies a gain 2 to the high frequency signal V.sub.e -V.sub.ref :2, which is linked with the choice of the use of a single comparison threshold V.sub.ref :2 for all the cells. This method leads to a limitation of the performances of the converter, because the accuracy of the gain of each amplifier conditions the resolution of the converter in the complete pass band.
Moreover, the speed of the converter is dependent on the pass band of the amplifiers and on the total transit time of the N cells. Thus, it can be stated that while the information is being propagated up to the final bit, the input signal must vary by no more than the value of the least significant bit, which requires the use of a sample and hold circuit which, as from a certain speed threshold, introduces more performance limitations than the remainder of the converter means. Finally, the application of a precise gain 2 to a high frequency signal is difficult.
Dichotomizing analog - digital converters are known, in which the high frequency signal is not multiplied and in which, in fact, the reference signal, which is constant is divided by two in each cell. Such analog - digital converters are more particularly described in Britishp patent application Nos.1,266,962 and 1,601,115. They comprise a sequence of cells in cascade, each cell comprising a diode bridge, the comparison being carried out in each cell on current signals and no longer on voltage signals.
The construction of an analog - digital converter in which comparison takes place on the current signals is difficult, particularly with respect to the cascade arrangement of the cells. In the aforementioned patent applications, this difficulty is obviated by the use of an intermediate circuit operating in voltage between two consecutive cells.
However, another difficulty is that the output potentials of a cell are incompatible with the input potentials of the following cell. This problem is solved by the use, in alternating manner, of complementary cells. Thus, this solution implies the use, in the intermediate cell, of npn transistors for the conversion of the signal from the diode bridges of the cells of even order (for example) and pnp transistors for the conversion of the signal from the diode bridges of cells of uneven order.
This structure with complementary cells considerably limits the performances of the analog - digital converter on the one hand because the cutoff frequency of pnp transistors is only approximately 1 megahertz, whereas the cut-off frequency of npn transistors is approximately 1 gigahertz, and on the other hand because the current gain of pnp transistors is low (approximately between 1 and 30), which leads to a compensation problem of the basic currents of the transistors at the diode bridge input.